Jadavpur University · ETCE

Hi, I'm Ranit

An Aspiring

I build things at the boundary of hardware and software — from Verilog logic circuits to full-stack, offline-first web apps — with a growing focus on data structures, algorithms, and clean system design.

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01 · About

Where circuits meet code

Ranit Gorai Professional Photo

RANIT GORAI // ETCE, JADAVPUR UNIVERSITY

I'm a student at Jadavpur University specializing in Electronics and Telecommunication, with academic grounding in digital systems and a self-driven track record in software: full-stack web apps, data structures & algorithms, and competitive programming.

Recently, I spent time at the CRIS Lab, IISc Bangalore, analyzing protocol design for secure multi-party computation — work that earned an invitation to Google's GSEC India Research Day.

02 · Research

Signal, before it becomes software

A short detour into research — where the same systems thinking applies at the protocol level.

Secure Multi-Party Computation — Protocol Analysis

CRIS Lab, Indian Institute of Science (IISc) Bangalore

Analyzed protocol design for secure multi-party computation, examining how systems can jointly compute over private inputs without exposing them — the same instinct for boundaries and clean interfaces that shows up in circuit design and system architecture.

Invited to Google's GSEC India Research Day

03 · Skills

The stack, layer by layer

Languages

MOD_01
C/C++ Python TypeScript

Frontend & Tools

MOD_02
React HTML CSS Vite Git & GitHub

Systems & Data

MOD_03
Data Structures & Algorithms SQL & DBMS PWA

Hardware & EDA

MOD_04
Verilog HDL Multisim LaTeX

04 · Projects

Things I've built

Software · PWA

Expense Manager — Local-First PWA

An installable, offline-first Progressive Web App for personal and group expense tracking. Data lives entirely on-device in IndexedDB, with optional encrypted backup to Google Drive — no server required to use it.

React 18 TypeScript MUI v5 IndexedDB Vite
Digital logic circuit schematic
Hardware · Verilog

Digital Logic Circuits Design

Architected and implemented a diverse range of digital logic circuits, progressing from fundamental combinational designs to medium-complexity sequential systems, including control units for instruction sequencing and control flow.

Verilog HDL DLCs Multisim